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  • uIP: Binary FSK Demodulator
  • uIP ID: 2706483
  • μIP Type: Digital μIP
  • HDL: Verilog
  • Warranty: YES
  • Simulation Tool: Cadence NC-Verilog
  • Tool Version:
  • Design Format: RTL
  • Merge In Foundry: NO
    Designer Information
  • Member ID:7730998000300188
  • Designer Rating:
  • Feedback received:0
 

1. Introduction:

This IP is a precision Binary-FSK Demodulator IP Core based on a non-coherent receiver design.  The demodulator is fully programmable, allowing   for   a   varied   range   of   symbol   rates   and   mark/space tone frequencies. Input data samples may be either complex or real for support of either passband or baseband signals.  The module allows easy connectivity to an external ADC with up to 16-bit signed input samples.

 

Applications:

  • Short range telemetry
  • Software radio

2. License Price:

By Quotes

Multiple License : NO

3. Clock Rate:

200 MHz

4. Logic Gate Count:

None

5. Technology:

None

6. Version:

1.0