1. Introduction:
FIR_F is an FIR filter implementation designed for very high sample rate applications. Organized as a systolic array the filter is modular and fully scalable, permitting the user to specify large order filters without compromising maximum attainable clock-speed. Mathematically, the filter implements the difference equation:
y[n] = h0 x[n] + h1 x[n−1] + ... + hN x[n−N ]
In the above equation, the input signal is x[n], the output signal is y[n] and h0 to hN represent the filter coefficients. The number N is the filter order, the number of filter taps being equal to N+1.
Application
2. License Price:
By Quotes
Multiple License : NO
3. Clock Rate:
300 MHz
4. Logic Gate Count:
None
5. Technology:
None
6. Version:
1.0