1. Introduction：

Our IP core implements the Reed Solomon encoding algorithm and is parameterized in terms of bits per symbol, maximum codeword length and maximum number of parity symbols. It  also  supports  varying  on  the  fly  
shortened  codes.  Therefore  any desirable code-rate can be easily achieved rendering the decoder ideal for fully adaptive FEC applications. ntRSE core supports continuous or burst  decoding.  The  implementation  is  very  low  latency,  high  speed with a simple interface for easy integration in SoC applications.

2. License Price：

30000 Points

Multiple License : NO

3. Clock Rate：

250 MHz

4. Logic Gate Count：

2.5 K Gates

5. Technology：

180 nm

6. Version：

1.0