1. Introduction：

The IP Core is a fully pipelined chroma resampler that converts pixels between 4:4:4 and 4:2:2 formats in the YCbCr colour space. In total, the IP Core package contains two distinct modules – one module that converts from 4:4:4 to 4:2:2 and the other that performs the reciprocal operation from 4:2:2 to 4:4:4.

Pixels flow into the design in accordance with the valid ready pipeline protocol. Input pixels and syncs are sampled on the rising edge of clk when PIX_VALID and PIX_READY are both high. At the output interface, pixels and syncs are sampled on a the rising edge of clk when POUT_VALID and POUT_READY  are high. The input and output sync signals are coincident with the first pixel of a frame and the first pixel of a line.  These are useful to identify the video frame and line boundaries. 

Application

• Digital video and image processing
• Interfacing between different video processing and video transceiver ICs that use different colour formats

2. License Price：

By Quotes

Multiple License : NO

3. Clock Rate：

400 MHz

4. Logic Gate Count：

None

5. Technology：

None

6. Version：

1.0