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  • uIP: [110nm]10-bit 80 MSPS ADC IP
  • uIP ID: 1832886372
  • μIP Type: Analog μIP
  • HDL: Verilog Behavioral Model
  • Warranty: YES
  • Simulation Tool: Cadence NC-Verilog
  • Tool Version:
  • Design Format: GDS
  • Merge In Foundry: NO
    Designer Information
  • Member ID:9120889000900143
  • Designer Rating:
  • Feedback received:0
 

1. Introduction:

UIP_ADC10_80M_183288 is an ultra-compact and very low power analog-to-digital converter (ADC) silicon IP. The 10-bit 80 MSPS ADC includes an internal custom bandgap voltage reference. It is capable of supplying bias currents to other parallel ADCs.

 

The ADC uses fully differential pipeline architecture with custom low-disturbance digital correction technique which allows single supply bus for both digital and analog. The ADC is designed for high dynamic performance for input frequencies up to Nyquist. This makes the IP perfectly suitable for video, imaging and communication appliances.

 

The IP is available in different metal options as well as deep N-well (DNW) option for SoC with high level of substrate noise. It consumes only 24mW at 80 MSPS operation and requires silicon area of 0.21 mm2. The IP does not require any external decoupling and is ideal for integration in mixed-signal systems. The output data of ADC is available in 2’s complement format.

 

UIP_ADC10_80M_183288 can be used in the following applications:

 

‧Digital imaging
‧TV/Video
‧Wireless LAN
‧Rx communication channel

2. License Price:

60000 Points

Multiple License : YES

   - Discount for 2 ~ 5 license:50 %
   - Discount for 6 ~ 10 license:60 %
   - Discount for 11 ~ license:70 %

3. Trial Run Price:

3000 Points

4. Clock Rate:

80 MHz

5. Area:

210 K μm^2

6. Technology:

110 nm

7. Version:

1.0