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IP Mart


Mart > IP Mart

   

 
  • uIP: Low power oscillator
  • uIP ID: 1781275562
  • μIP Type: Analog μIP
  • HDL: Verilog Behavioral Model
  • Warranty: YES
  • Simulation Tool: Cadence NC-Verilog
  • Tool Version:
  • Design Format: GDS & Schematic
  • Merge In Foundry: NO
    Designer Information
  • Member ID:2251561000800427
  • Designer Rating:
  • Feedback received:0
 

1. Introduction:

OSC32K is designed for 40nm advance process with 1.2v to 3.3v wide power(VDD) range. 

 

2. License Price:

12000 Points

Multiple License : NO

3. Trial Run Price:

0 Points

4. Clock Rate:

32 KHz

5. Area:

100.1 μm^2

6. Technology:

40 nm

7. Version:

0.1