Contact UsNeed
help
?







IP Mart




Mart > IP Mart

   

 
  • uIP: USB 3.0 PHY in 110nm
  • uIP ID: 753783042
  • μIP Type: Analog μIP
  • HDL: Verilog Behavioral Model
  • Warranty: YES
  • Simulation Tool: Synopsys VCS
  • Tool Version:
  • Design Format: GDS
  • Merge In Foundry: YES
    Designer Information
  • Member ID:1130893000900598
  • Designer Rating:
  • Feedback received:0
 

1. Introduction:

The IP is a high speed SERDES macro which complies with USB3.0 electrical interface specification.  This macro can be easily fabricated to form multiple lanes and implemented in USB systems design, both Host and Device.The  IP is supported USB3.0 Super Speed (5Gbps) protocol and data rate.


2. License Price:

By Quotes

Multiple License : YES

   - Discount for 2 ~ 5 license:0 %
   - Discount for 6 ~ 10 license:0 %
   - Discount for 11 ~ license:0 %


3. Trial Run Price:

By Quotes


4. Clock Rate:

25 MHz


5. Area:

1 M μm^2


6. Technology:

110 nm


7. Version:

1.1