The USB PHY is an UTMI compatible USB2.0 device PHY IP which does not
require external oscillator reference. It is comprised of both USB1.1 and USB2.0
transceivers and it is also comprised of digital logic needed to convert USB serial
data to 8 or 16 bit parallel data.
The IP is a high speed SERDES macro which complies with USB3.0 electrical interface specification. This macro can be easily fabricated to form multiple lanes and implemented in USB systems design, both Host and Device.The IP is supported USB3.0 Super Speed (5Gbps) protocol and data rate.