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High Speed CAN Transceiver By Quotes None 1 MHz None  
The MX102 is the interface between the Controller Area Network (CAN) protocol controller and the physical bus. It is primarily intended for high speed applications, up to 1 Mbps, in passenger cars. The device provides differential transmit capability to the bus and differential receive capability to the CAN controller.                   The MX102 also features a very low current standby mode with remote wake up capability via the bus. Introduction
14-Bit 1MSPS DAC in GSMC110nm By Quotes 75.000 K μm^2 1 MHz 110 nm  
MIC_DAC14 is compact and low power 14-bit digital-to-analog converter silicon IP. It features wide range input supply voltage from 1.7V to 5.6V. Its single-end output ranges from 0.1 to 0.9 of supply voltage. Introduction
High Stable Timers IP By Quotes None 0.8 MHz None  
Timers are used for scheduling the different activities within the system. Timers generates interrupt in system and Operating system(OS) Schedules different Timers and maps them to different Interrupt Service Routine (ISR) to start on different interrupts. It can happen before starting a activity or application, OS configures a timers and give control to application to operate. On Interrupt trigger a interrupt, ISR kicks in and passes control back to OS. A Miss Function on this block can make system to mis-behave a lot. These section explains issues with normal timers and benefits of this high stable timers over conventional timers. -The Problem with Current Technology  Timers carry large counters, Registers, clocks pre-scalers and synchronizations and all these are built by Simple Components which do not have any stability.  If the SOC is exposed to different hazards like radiations, sparks or other events. These logics can be corrupted within counters and registers carrying configuration. This may result in corruption in stored configurations or counters or data or control passing by and can make interrupts to be generated fast or slower rate or even stopped. If system gets faster interrupt, then expected will make control to passed back to Operating system(OS) from the application or much before the application actually able to complete the task. This make system to not able to perform the required task. if interrupts generation is slowed down, will keep the OS waiting much longer to get control and application work is finished long back. This can make system to slow down or Hang. -The Solution High Stable Timers from GreenIPCore can sustain across all system un-stability and misbehavior problems. This Timers is strengthening system against any kind of dirty Electromagnetic noise and capable of protecting the System operation without disruption. The Timers is constructed with high stable components. The High Stable Timers shown above will not fail due to any hazardous event.   Introduction
Dual-Channel 12-bit 80 MSPS ADC IP in UMC 65 nm By Quotes 450.000 μm^2 0.8 MHz 65 nm  
ADC X is an ultra-compact and very low power analog-to-digital converter (ADC) IP. The 12-bit 80 MSPS Dual ADC includes an internal custom bandgap voltage reference. It is capable of supplying bias currents to other parallel ADCs. IP architecture is robust and can be ported to other 65 nm processes.The ADC uses fully differential pipeline architecture with custom low-disturbance digital correction technique which allows single supply bus for both digital and analog. Introduction
MIPI PHY By Quotes None None None  
This product offers complete debug facilities to validate Application processors with MIPI interfaces, MIPI Cameras and MIPI displays.  Introduction
ASRC-Pro : 24-bit -130dB THD+N Multi-Channel Audio Sample Rate Converter By Quotes None 192 KHz 45 nm  
The ASRC-pro is part of multi-channel Asynchronous Audio Sample Rate Converters (ASRC). This core can be used to interface digital audio equipments operating at different sample rates. It has been designed for systems requiring very high quality in terms of low harmonic distortion and noise, tolerance and rejection of input jitter. The ASRC-pro can perform common sample rate conversions with less than -130 dB of Total Harmonic Distortion plus Noise (THD+N) and has a Dynamic range of 131 dB, supporting input data processing of up to 24-bit resolution. The ASRC series are implemented to support several key industry interfaces: TDM parallel, TDM serial, Parallel, I2S, SPDIF-AES3. We offers a broad range of asynchronous sample rate converters targeted for variety of audio applications. Application: Set-top boxes, professional and hi-fi audio Home Theater Systems Automotive Audio Systems Digital Audio Effects Processors Digital Audio Broadcast Equipment Introduction
ASRC-Lite : 16-bit -90dB THD+N Multi-Channel Audio Sample Rate Converter By Quotes None 192 KHz 45 nm  
The ASRC-lite  is part of multi-channel asynchronous Audio Sample Rate Converter (ASRC). This core can be used to interface digital audio equipments operating at different sample rates. It has been designed for systems that require a low-cost solution, maintaining low harmonic distortion and noise, and a high tolerance and rejection of input jitter. The ASRC-lite can perform common sample rate conversions with less than -90 dB of Total Harmonic Distortion plus Noise (THD+N) and has a Dynamic range of 92 dB, supporting input data of 16-bit resolution. The ASRC series are implemented to support several key industry interfaces: TDM parallel, TDM serial, Parallel, I2S, SPDIF-AES3. We offers a broad range of asynchronous sample rate converters targeted for variety of audio applications   Application : Set-top boxes, professional and hi-fi audio Home Theater Systems Automotive Audio Systems Digital Audio Effects Processors Digital Audio Broadcast Equipment Introduction
The TDM-Rx-Pro is part of proven audio interface cores featuring a configurable multi-channel audio By Quotes None 192 KHz 65 nm  
The TDM-Rx-Pro  is part of proven audio interface cores featuring a configurable multi-channel audio interface designed to input serial (TDM) digital audio streams from various manufacturers. The TDM-Rx-Pro front-end also supports the well known stereo formats: Philips I2S, Left-Justified or Right-Justified. The TDM-Rx-Pro backend is supplied with a choice of AMBA®, CoreConnect™ or a flexible parallel interface. Introduction
Sigma-Delta Stereo CODEC in 55nm By Quotes 562.800 K μm^2 96 KHz 55 nm  
The IP is a high resolution, single-chip stereo CODEC that employs the Sigma-Delta noise shaping technique for 55nm logic process. The ADC, DAC and power amplifier are integrated in it. With 18bit resolution for DAC and 18bit resolution for ADC, The IP is suitable for applications in consumer digital audio systems, automobile audio, multimedia and digital systems. Introduction
Low power oscillator 12000 Points 100.100 μm^2 32 KHz 40 nm  
OSC32K is designed for 40nm advance process with 1.2v to 3.3v wide power(VDD) range.    Introduction
μIP Price Logic Gate Count Clock Rate Technology   Ratings

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