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| Low power oscillator | 12000 Points | 100.100 μm^2 | 32 KHz | 40 nm |  |
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| OSC32K is designed for 40nm advance process with 1.2v to 3.3v wide power(VDD) range. | Introduction | |||||
| USB2.0 OTG PHY in 40 nm | 80000 Points | 257.556 K μm^2 | 30.6 MHz | 40 nm | |
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| The IP is an UTMI+ Level 3 compatible USB2.0 OTG function transceiver IP. It is comprised of both USB1.1 and USB2.0 transceivers; itis comprised of digital logic needed to convert USB serial data to 8 or 16 bit parallel data for high speed and full speed. It is also support full speed and low speed serial mode. | Introduction | |||||
| BRAINS | 50000 Points | 5.250 K Gates | 1.2 GHz | 40 nm | |
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| With improvement of technology node and IC design is geting more complex, the ratio of embedded memory in SoCs have been exceeding 50%. The fault types of memory are getting complex. The Memory BIST (Built-In Self-Test) is generated for efficient controlling IC cost. The traditional BIST method is inserted along with single memory. If there are many memories in SoCs, the area and testing time of SoCs are expanded a lot due to insertion of BIST. Therefore the SoCs' cost will increase rapidly because memory testing time is too long. We devoted in developing SRAM testing solutions for a long time. BRAINS is based on memory testing patents to reduce testing time and increase yield rate. In addition, BRAINS has many unique features to increase SoCs' reliability and stability. | Introduction | |||||
| HEART(High Efficient Accumulative Repairing Technical) | 50000 Points | 5.250 K Gates | 2.2 GHz | 40 nm | |
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| HEART can efficient repair faulty SRAM after using BRAINS. SoCs can mantain correctness of functions and avoid fatal error of system reault in SRAM's defect through SRAM's repairing technical. HEART is SRAM accumulative repairing technical, and it combines advantages of Soft-repair and Hard-repair. HEART supports internal registers of SoCs and external storages of SoCs to record SRAM's faulty information. Once SoCs have new SRAM's defect after using them for a long time, users can repeated repair SRAM's defect through HEART. In addtion, HEART also support "On-Demad" testing and repairing requirement. It means that users can enable system registers of SoCs or signal of HEART to test and repair SRAM at one when SoCs have fatal error situations. | Introduction | |||||
| NVM test and repair | 60000 Points | 5.250 K Gates | 2.2 GHz | 40 nm | |
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| HEART (High Efficient Accumulative Repairing Technical) is a built-in self-repair (BISR) mechanism which uses to recover errors detected after memory testing and to improve yield rate. This mechanism is implemented with spare memories and a built-in redundancy analyze (BIRA) logics which is designed to allocate the redundancy. It needs a storable device (eFuse, OTP or registers) to store testing results after analysis. We provides an efficient accumulative repairing solution to combine advantages of soft BISR mechanism and hard BISR mechanism for improving yield rate. | Introduction | |||||
| USB2.0 UTMI Device PHY(non-oscillator) | 100000 Points | 280.000 K μm^2 | 30.6 MHz | 40 nm | |
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| The USB PHY is an UTMI compatible USB2.0 device PHY IP which does not require external oscillator reference. It is comprised of both USB1.1 and USB2.0 transceivers and it is also comprised of digital logic needed to convert USB serial data to 8 or 16 bit parallel data. | Introduction | |||||
| 140 mA Buck DC-DC Converter in 40 nm (VBKS0140T040) | By Quotes | None | None | 40 nm | |
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| Buck DC-DC Converter for Integrated PMU (Silicon-proven 40 nm, 140 mA, optimized clocking to eliminate spurious emissions for low system noise) This series of buck DC-DC converters delivers up to 140 mA of load current and features optimized clocking options to eliminate spurious emissions resulting in much lower system noise. This buck DC-DC converter is silicon-proven in a 40 nm process and is a part of our 40 nm integrated power management unit (PMU) IP core series that has been optimized for integration into Application Specific Integrated Circuits (ASICs) or Systems-on-a-Chip (SoCs), including radio frequency (RF), wireless, and narrowband Internet of Things (NB-IoT) applications. | Introduction | |||||
| Flexsupply™ Switching Converter in 40 nm (VRDS00XXT040) | By Quotes | None | None | 40 nm | |
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| Flexsupply™ Switching Converter (Silicon-proven 40 nm, allows products to work at ultra-low battery levels, no external components needed) Flexsupply™ Buck/Boost DC-DC Converters: This series of buck/boost switched capacitor regulated voltage doubler IP cores allows operation across a wide range of battery voltage levels, without external components. With their low power consumption and integrated, modular design, this series of IP cores supports a broad range of industry applications with improved efficiency and flexibility. | Introduction | |||||
| High-Accuracy Bandgap Reference in 40 nm (VBR120T040) | By Quotes | None | None | 40 nm | |
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| Bandgap Reference for Integrated PMU (Silicon-proven 40 nm, high-accuracy of < ±1%) This series of fully-integrated high-accuracy bandgap voltage references generates a 1.2 V output voltage and supports an input from 2.8 to 4.2 V. They provide an output voltage accuracy of < ±1%. These bandgap references are silicon-proven in a 40 nm process and are a part of our 40 nm integrated power management unit (PMU) IP core series that has been optimized for integration into Application Specific Integrated Circuits (ASICs) or Systems-on-a-Chip (SoCs), including radio frequency (RF), wireless, and narrowband Internet of Things (NB-IoT) applications. | Introduction | |||||
| 3 mA Capless LDO in 40 nm (VLDS0003LNT040) | By Quotes | None | None | 40 nm | |
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| Power Quencher® Capless LDO (Silicon-proven 40 nm, 3 mA, excellent quiescent current for IoT) This series of low-power, fully-integrated low dropout (LDO) voltage regulators achieves a low-noise output voltage without external components, thus saving package pins and valuable PC board space. These LDOs are silicon-proven in a 40 nm process and are a part of our 40 nm integrated power management unit (PMU) IP core series that has been optimized for integration into Application Specific Integrated Circuits (ASICs) or Systems-on-a-Chip (SoCs), including radio frequency (RF), wireless, and narrowband Internet of Things (NB-IoT) applications. | Introduction | |||||
| μIP | Price | Logic Gate Count | Clock Rate | Technology | Ratings | |
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