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| Ultra-low Power Voltage Reference in 40 nm (VVR060LT040) | By Quotes | None | None | 40 nm |  |
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| Voltage Reference for Integrated PMU (Silicon-proven 40 nm, low-power for IoT with quiescent current of <0.9 μA) This series of fully-integrated low power voltage references generates a 0.6 V output voltage and supports an input from 2.8 to 4.2 V. They operate at an ultra-low quiescent current of < 0.9 μA. These voltage references are silicon-proven in a 40 nm process and are a part of our 40 nm integrated power management unit (PMU) IP core series that has been optimized for integration into Application Specific Integrated Circuits (ASICs) or Systems-on-a-Chip (SoCs), including radio frequency (RF), wireless, and narrowband Internet of Things (NB-IoT) applications. | Introduction | |||||
| ASRC-Pro : 24-bit -130dB THD+N Multi-Channel Audio Sample Rate Converter | By Quotes | None | 192 KHz | 45 nm | |
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| The ASRC-pro is part of multi-channel Asynchronous Audio Sample Rate Converters (ASRC). This core can be used to interface digital audio equipments operating at different sample rates. It has been designed for systems requiring very high quality in terms of low harmonic distortion and noise, tolerance and rejection of input jitter. The ASRC-pro can perform common sample rate conversions with less than -130 dB of Total Harmonic Distortion plus Noise (THD+N) and has a Dynamic range of 131 dB, supporting input data processing of up to 24-bit resolution. The ASRC series are implemented to support several key industry interfaces: TDM parallel, TDM serial, Parallel, I2S, SPDIF-AES3. We offers a broad range of asynchronous sample rate converters targeted for variety of audio applications. Application: Set-top boxes, professional and hi-fi audio Home Theater Systems Automotive Audio Systems Digital Audio Effects Processors Digital Audio Broadcast Equipment | Introduction | |||||
| ASRC-Lite : 16-bit -90dB THD+N Multi-Channel Audio Sample Rate Converter | By Quotes | None | 192 KHz | 45 nm | |
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| The ASRC-lite is part of multi-channel asynchronous Audio Sample Rate Converter (ASRC). This core can be used to interface digital audio equipments operating at different sample rates. It has been designed for systems that require a low-cost solution, maintaining low harmonic distortion and noise, and a high tolerance and rejection of input jitter. The ASRC-lite can perform common sample rate conversions with less than -90 dB of Total Harmonic Distortion plus Noise (THD+N) and has a Dynamic range of 92 dB, supporting input data of 16-bit resolution. The ASRC series are implemented to support several key industry interfaces: TDM parallel, TDM serial, Parallel, I2S, SPDIF-AES3. We offers a broad range of asynchronous sample rate converters targeted for variety of audio applications Application : Set-top boxes, professional and hi-fi audio Home Theater Systems Automotive Audio Systems Digital Audio Effects Processors Digital Audio Broadcast Equipment | Introduction | |||||
| WiFi Frequency Synthesizer IP In 2.4GHz Band | 100000 Points | 200.000 K μm^2 | 3.2 GHz | 55 nm | |
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| The frequency synthesizer uses a single 1.25V power supply. Good noise immunity allows this IP to be integrated in a noisy SOC environment. The synthesizer operates at 1.5X WiFi 2.4GHz band for wireless application. | Introduction | |||||
| Sigma-Delta Stereo CODEC in 55nm | By Quotes | 562.800 K μm^2 | 96 KHz | 55 nm | |
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| The IP is a high resolution, single-chip stereo CODEC that employs the Sigma-Delta noise shaping technique for 55nm logic process. The ADC, DAC and power amplifier are integrated in it. With 18bit resolution for DAC and 18bit resolution for ADC, The IP is suitable for applications in consumer digital audio systems, automobile audio, multimedia and digital systems. | Introduction | |||||
| Rapid IO PHY in 65nm | By Quotes | 2.295 μm^2 | 25 MHz | 65 nm | |
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| The IP is designed for chips that perform high bandwidth data communication while operating at low power consumption. It can also be used in any serial interface where timing and electrical specification can be satisfied. This IP has four individual Transmitter (TX) and Receiver (RX) channels, and one common phase lock loop (PLL). | Introduction | |||||
| Dual-Channel 12-bit 80 MSPS ADC IP in UMC 65 nm | By Quotes | 450.000 μm^2 | 0.8 MHz | 65 nm | |
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| ADC X is an ultra-compact and very low power analog-to-digital converter (ADC) IP. The 12-bit 80 MSPS Dual ADC includes an internal custom bandgap voltage reference. It is capable of supplying bias currents to other parallel ADCs. IP architecture is robust and can be ported to other 65 nm processes.The ADC uses fully differential pipeline architecture with custom low-disturbance digital correction technique which allows single supply bus for both digital and analog. | Introduction | |||||
| The TDM-Rx-Pro is part of proven audio interface cores featuring a configurable multi-channel audio | By Quotes | None | 192 KHz | 65 nm | |
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| The TDM-Rx-Pro is part of proven audio interface cores featuring a configurable multi-channel audio interface designed to input serial (TDM) digital audio streams from various manufacturers. The TDM-Rx-Pro front-end also supports the well known stereo formats: Philips I2S, Left-Justified or Right-Justified. The TDM-Rx-Pro backend is supplied with a choice of AMBA®, CoreConnect™ or a flexible parallel interface. | Introduction | |||||
| 10-bit 300 MSPS Video DAC IP in 90 nm | 60000 Points | 76.000 K μm^2 | 300 MHz | 90 nm | |
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| The UIP_DAC10-300M_205370 is a 10-bit DAC designed in low power TSMC 90 nm logic process. It consists of a current steering DAC. The DAC uses a fully differential architecture. The input data of the DAC is in 1.2V, in unsigned format. A 3.3V supply is used for the analog portion of the IP. This high performance DAC is designed for CVBS standard or RGB Video signal bandwidth. The IP consumes only 41 mA at 300 MSPS operation and utilizes a silicon area of only 0.076 mm2. The IP does not require any external decoupling and is ideal for integration in mixed-signal systems. The DAC output current is 6-bit programmable. The IP architecture is robust and can be ported to other 90 nm processes. APPLICATIONS Composite Video (CVBS) HDTV RGB Video DAC Output Model | Introduction | |||||
| Triple 10-bit 330 MSPS Video DAC IP in TSMC 90 nm | By Quotes | 330.000 μm^2 | 330 MHz | 90 nm | |
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| MIC_DAC10X3 is a 10-bit Triple DAC designed in TSMC 90 nm logic process. It consists of a current steering DAC. The DAC uses a fully differential architecture. The input data of the DAC is in 1.2 V, in unsigned format. | Introduction | |||||
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