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| Flexsupply™ Switching Converter in 40 nm (VRDS00XXT040) | By Quotes | None | None | 40 nm |  |
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| Flexsupply™ Switching Converter (Silicon-proven 40 nm, allows products to work at ultra-low battery levels, no external components needed) Flexsupply™ Buck/Boost DC-DC Converters: This series of buck/boost switched capacitor regulated voltage doubler IP cores allows operation across a wide range of battery voltage levels, without external components. With their low power consumption and integrated, modular design, this series of IP cores supports a broad range of industry applications with improved efficiency and flexibility. | Introduction | |||||
| 140 mA Buck DC-DC Converter in 40 nm (VBKS0140T040) | By Quotes | None | None | 40 nm | |
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| Buck DC-DC Converter for Integrated PMU (Silicon-proven 40 nm, 140 mA, optimized clocking to eliminate spurious emissions for low system noise) This series of buck DC-DC converters delivers up to 140 mA of load current and features optimized clocking options to eliminate spurious emissions resulting in much lower system noise. This buck DC-DC converter is silicon-proven in a 40 nm process and is a part of our 40 nm integrated power management unit (PMU) IP core series that has been optimized for integration into Application Specific Integrated Circuits (ASICs) or Systems-on-a-Chip (SoCs), including radio frequency (RF), wireless, and narrowband Internet of Things (NB-IoT) applications. | Introduction | |||||
| 400 mA Buck DC-DC Converter in 110 nm (VBKS0400T110) | By Quotes | None | None | 110 nm | |
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| Buck DC-DC Converter (Silicon-proven 110 nm, 400mA, excellent efficiency) The VBKS0400T110 IP core is a Buck DC-DC switching converter that delivers up to 400 mA of load current. It includes voltage, current and clock references, power-on-reset circuitry, overcurrent protection, a temperature sensor and ESD protection. Soft-start circuitry prevents high currents during start-up, and soft-stop circuitry provides a controlled shut-down sequence during a sudden shut down or fault detection. | Introduction | |||||
| 300 mA Capless LDO in 130 nm (VLDS0300LS130) | By Quotes | None | None | 130 nm | |
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| Power Quencher® Capless LDO (Silicon-proven 130 nm, 300 mA, excellent quiescent current and load transient regulation) The Power Quencher® series of fully-integrated low dropout (LDO) voltage regulators operates with ultra-low levels of power consumption without sacrificing other areas of performance. They achieve a low-noise output voltage and do not require the external output capacitor that is typically needed in an LDO for loop stability and noise reduction. This saves component count, board space and cost, and improves overall system reliability. The Power Quencher® LDO voltage regulator IP cores are optimized for integration into Application Specific Integrated Circuits (ASICs) or Systems-on-a-Chip (SoCs), including radio frequency (RF), wireless, and Internet of Things (IoT) applications. | Introduction | |||||
| 300 mA Capless LDO in 180 nm (VLDS0300RNM180) | By Quotes | None | None | 180 nm | |
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| Noise Quencher® Capless LDO (Silicon-proven 180 nm, 300 mA, excellent supply noise rejection and fast settling) Noise Quencher® LDOs: This series of low-power, fully-integrated low dropout (LDO) voltage regulators uses our patented Noise Quencher® Technology to provide best-in-class dynamic performance and noise rejection. The IP cores are unconditionally stable across a wide range of load currents and load capacitances and also do not require external components, thus saving package pins and valuable PC board space. These LDOs are optimized for stand-alone power management integrated circuit (PMIC) ASSPs and other analog and digital applications. | Introduction | |||||
| PLL with Multiple Output Frequency | By Quotes | 40.000 K μm^2 | 12.156 MHz | 130 nm | |
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| The PLL is a 0.13μm Phase-Locked Loop (PLL) cell that provides a clock multiplier that can generate a stable 48M/96M/120MHz/156MHz clock from a 12MHz clock source. This is a “generic” PLL which integrates the Voltage-Controlled Oscillator (VCO), Phase-Frequency Detector, Low Pass Filter, Loop Divider and Post Divider. This PLL provides an operating voltage range of 1.08V ~ 1.32V, and an operating junction temperature range of -40˚ ~ 125℃. | Introduction | |||||
| 4.2V-to-1.8V DC/DC Converter | By Quotes | 40.000 K μm^2 | 1 Hz | 130 nm | |
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| The DCDC18 is a 0.13μm DC to DC converter in buck mode cell that converters input voltage to a smaller output voltage. The output voltage can be programmed from 1.65V to 1.9V.An external 10uH inductor is necessary. | Introduction | |||||
| 4.2V-to-1.2V DC/DC Converter | By Quotes | 40.000 K μm^2 | 1 MHz | 130 nm | |
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| The DCDC12 is a 0.13μm DC to DC converter in buck mode cell that converters input voltage to a smaller output voltage. The output voltage can be programmed from 1.05V to 1.3V.An external 10uH inductor is necessary. | Introduction | |||||
| 10-Bit 1MSPS Cyclic A/D Converter | By Quotes | 300.000 K μm^2 | 10.12 MHz | 250 nm | |
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| This IP is a 1MSPS , single supply , 10-bit analog-to-digital converter (ADC) that combines a low cost, high speed CMOS process and a novel architecture. It is a complete ADC with an on chip, high performance sample-and-hold amplifier and voltage reference. An external reference can be chosen to suit the dc accuracy and temperature drift requirements of the application. The device uses a cyclic architecture with digital error correction logic to guarantee no missing code over the full operating range. The input of this ADC is highly flexible. A truly differential input structure allows for both single-ended and differential input interface of varying span. The sample-and-hold amplifier (SHA) is equally suited for multiplexed systems that switched full-scale voltage levels in successive channels as well as sampling single-channel inputs at frequencies up to and beyond the Nyquist rate of 500KHz. | Introduction | |||||
| Sigma-Delta Stereo CODEC in 55nm | By Quotes | 562.800 K μm^2 | 96 KHz | 55 nm | |
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| The IP is a high resolution, single-chip stereo CODEC that employs the Sigma-Delta noise shaping technique for 55nm logic process. The ADC, DAC and power amplifier are integrated in it. With 18bit resolution for DAC and 18bit resolution for ADC, The IP is suitable for applications in consumer digital audio systems, automobile audio, multimedia and digital systems. | Introduction | |||||
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